VITA 65 & Rugged OpenVPX Solutions
Curtiss-Wright is a leading supplier of boards and systems designed to be compliant with OpenVPX™ (VITA 65). We are proud of our role as a leading participant in the open standards process that resulted in the ANSI ratification of VITA 65.
The rugged OpenVPX framework defines a system-wide specification, streamlining the use of VPX. It delineates clear interoperability points necessary for integrating module to module, module to backplane, and chassis. OpenVPX will evolve and incorporate new fabric, connector, and system technologies as new standards are defined.
What is VPX?
VPX™ (VITA 46) specifications establish a new direction for the next revolution in bus boards. VPX is an ANSI standard which breaks out from the traditional connector scheme of VMEbus to merge the latest in connector and packaging technology with the latest in bus and serial fabric technology. VPX combines best-in-class technologies to assure a very long technology cycle similar to that of the original VMEbus solutions. Traditional parallel VMEbus will continue to be supported by VPX through bridging schemes that assure a solid migration pathway.
Technologies called for in VPX include:
- Both 3U and 6U formats
- New 7-row high speed connector rated up to 6.25 Gbps
- Choice of high speed serial fabrics
- PMC and XMC (VITA 42) mezzanines
- Hybrid backplanes to accommodate VME64, VXS and VPX boards
What is VPX-REDI?
VPX™ REDI was inspired by the need for higher density electronics, increased power draw that requires more effective cooling strategies, and rugged and maintainable modules. VPX REDI targets the requirements of COTS platforms for defense and aerospace, defining mechanical design implementations for embedded computing modules with three primary design objectives:
- Accommodating cooling methods including forced air, conduction, and liquid cooling.
- Adding features compatible with ESD covers required for two-level maintenance strategies.
- Facilitating module designs with components on the secondary side of the circuit board.
Special Report: Avoid 4 Common Pitfalls of Designing an OpenVPX System
OpenVPX™ Interoperability and Rugged Signal Processing
The Importance of Signal Integrity: Achieving Robust Gen3 >10 Gbaud Signaling in OpenVPX™ Systems
An OpenVPX System Specification Primer
First Public Demo of a Live OpenVPX System